Instruction set architecture
The instruction set architecture, often called simply ISA, is the formal specification of a particular type of computer, in the form of a full description of the instructions which the machine can execute, and any behavior associated with the execution of those instructions. The ISA describes everything that must be true about the machine language (the native commands available in a particular processor design).
An instruction set architecture is a theoretical description, and says nothing about how instructions are implemented in hardware. Since an ISA completely defines the behavior expected of the machine, the ISA definition can be used to write software that completely mimics the behavior of the "machine". Thus, an ISA can be considered to be a virtual machine.
The design of an ISA falls within the computer science area of specialization called computer architecture.
Computer architecture is an area of specialization within computer science which studies the design of ISA's and also how to implement ISA specifications in hardware. Creating a virtual machine program that "implements" an ISA in software is a process called virtualization and is more likely to be studied with the field in software engineering, where the ISA acts as the formal requirements definition for the program to be written.
An ISA usually includes the following items:
- a precise description of all the hardware data types (also called native data types)
- a list of machine instructions, also called opcodes (operation codes)
- descriptions of any registers
- allowed memory addressing modes
- memory management modes
- interrupts
- exception handling
- how external input/output (I/O) occurs
Because the instruction set architecture of a processor is fundamental to its interface and usage, it is often used as a classification of the "type" of processor, or CPU. For example, a PowerPC processor uses some variant of the PowerPC ISA. ISA's for a family of processors may need to be qualified by a version number or name variant, such as SPARC version 9.0.
Some processors, like the Intel Itanium, can actually interpret instructions for more than one ISA; however, this is often accomplished by software rather than by designing the hardware to directly support both interfaces. (See emulator.)